1. Technical Field
The present disclosure relates to a multilayer wiring substrate and, more particularly, to a multilayer wiring substrate capable of exhibiting excellent electrical characteristics typified by low impedance, good impedance matching, low crosstalk, etc. and solving the problem of heat radiation, and a method of manufacturing the same. Also, the present disclosure relates to a semiconductor device using the multilayer wiring substrate.
2. Related Art
With the progress of miniaturization and higher functionality of the semiconductor device in recent years, the number of electrode terminals of the semiconductor element mounted on the semiconductor device (referred to as the “semiconductor chip” hereinafter) is increasing. In order to address this tendency, such a method has been employed in which electrode terminals are formed on an electrode terminal forming surface of the semiconductor chip in an area array fashion and then the semiconductor chip is mounted on a wiring substrate by a flip-chip bonding. According to the flip-chip bonding, the electrode terminals and external connection terminals are electrically connected by bonding bumps formed on the electrode terminals of the semiconductor element to the external connection terminals (bumps) of the wiring substrate. Also, in order to address the miniaturization of wiring patterns, a method of building up wiring substrates in plural layers, i.e., so-called “built-up method”, is employed.
The wiring substrate having the above configuration has already been known. For example, in JP-A-2000-323516 (see e.g., Claims, FIG. 5), there is disclosed such a wiring substrate that includes an insulating resin formed like a sheet, electrodes formed in predetermined positions on the insulating resin, coated wires which are constructed by coating an insulating material on a surface of a conductive wire respectively to electrically connect the electrodes mutually and a part of which is exposed from the insulating resin respectively, and a conductive resin formed on the insulating resin to seal the coated wires exposed from the insulating material. Concretely, a semiconductor device having such wiring substrate can have a configuration shown in FIG. 10, for example. A semiconductor device 100 has a wiring substrate 110, a semiconductor element 112 mounted on this substrate, and solder balls 114. The wiring substrate 110 is constructed by bump bonding pads 116, external connection pads 117, a conductive resin 122, and an insulating resin 120. Also, the semiconductor element 112 has a plurality of bumps 115. The semiconductor element 112 is connected to the bump bonding pads 116 of the wiring substrate 110 by the flip-chip technology, and an underfill material 119 is filled between the semiconductor element 112 and the wiring substrate 110 to suppress occurrence of stress during the connecting step. Also, coated wires 118 are wire-bonded to both the bump bonding pads 116 and the external connection pads 117. The solder balls 114 are provided to mount a board 130 thereon.
In the semiconductor device 100 constructed as above, the problem exists in handling a heat generated from the semiconductor element 112. That is, since the board 130 is mounted just over the semiconductor element 112, the generated heat must be radiated effectively to operate the semiconductor element 112 stably. For this purpose, although not illustrated herein, normally radiation fins made of aluminum, for example, are mounted onto the back side of the wiring substrate 110 shown in FIG. 10 (the surface on the opposite side to the mounting surface of the semiconductor element 112), and thus the heat can be radiated from the radiation fins to the outside. However, when the wiring substrate is formed of the multilayer wiring substrate, such multilayer wiring substrate is constructed such that an electronic component is also mounted on the backside of the multilayer wiring substrate via the solder bumps, and thus the radiation fins cannot be mounted. Therefore, it is desirable that the problem of heat radiation should be solved in the multilayer wiring substrate.
In the multilayer wiring substrate, such a configuration is employed that inside pad portions that are not rerouted by the uppermost wiring layer in the pad array used for the high-density mutual connection are connected to the underlying wiring layer via the vertical vias whereas pad portions that are not rerouted by the wiring layer are connected to the further underlying wiring layer via the vertical vias. When such configuration is employed, the pad portions that are not rerouted by the uppermost layer are connected to the underlying layer via the vertical vias, and tough restrictions on channels are imposed to maintain relative positional relationships to neighboring pads.